PARALLEL PROCESSING FOR DEBLOCKING FILTER IN H.264/AVC

In this paper, we propose an efficient parallel architecture for the adaptive deblocking filter in H.264/AVC video coding standard. We use six forwarding shift register arrays (of which each contains 4×4 8-bit shift registers) with two transposing operations and two sets of filter operation (each set contains four edge filter operations) to support simultaneous processing of the horizontal and vertical filtering. The proposed architecture is called “Parallel Filtering Architecture (PFA). ” As a result, the performance of PFA is 390 % faster than the advanced architecture of the previous proposal. Moreover, the number of total memory references is reduced by 63% and 25 % respectively compared to the basic and advanced architectures of the previous proposal