An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits

This paper describes a new DC modeling methodology appli-cable to CMOS integrated circuits. It is named operating point driven DC formulation because the operating point is specified di-rectly, and the device dimensions W and L are determined out of it. With other methods, one specifies the device dimensions W and L and determines the operating point. Our method is important for manual design because it allows the designer to reason in terms of voltages and currents and releaves him from the burden of deter-mining device sizes. The algorithm is guaranteed to converge, and is computationally efficient, which allows interactive design space exploration using optimization-based sizing. A design plan used in optimization-based sizing consists for the largest part out of solv-ing the DC part. Speeding up the DC part with a computationally efficient algorithm, that allows parallellisation, results in a boost of optimization speed. I