ADC Testing by Decomposition of the Error Model

Abstract. Improvements in technology, increasing in resolution and various correction techniques of analogue-to-digital converters (ADC) makes linearity testing of ADC difficult and time-consuming task. New methods and approaches are examined. Statical and histogram tests require long time measurement and huge amount of data to be analysed. This paper deals with original approach for ADC modelling and testing that reduces time of measurement, providing information about linearity errors character with a good precision