figurable computing are commonly used methodologies for digital-systems design. However, no previous work has been carried out in order to define a HW/SW codesign methodology with dynamic scheduling for run-time reconfigurable architectures. In addition, all previous approaches to reconfigurable computing multicontext scheduling are based on static-scheduling techniques. In this paper, we present three main contributions: 1) a novel HW/SW codesign methodology with dynamic scheduling for discrete event systems using dynamically reconfigurable architectures; 2) a new dynamic approach to reconfigurable computing multicontext scheduling; and 3) a HW/SW partitioning algorithm for dynamically reconfig-urable architectures. We have developed a who...
A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. ...
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and so...
A central task in high-level synthesis isscheduling: the allocationof operations to clock cycles. Th...
HW/SW codesign and Reconfigurable Computing are commonly used methodologies for digital systems desi...
Many reconfigurable architectures offer partial dynamic configura-bility, but current system-level t...
This poster presentation outlines a proposed framework for handling mapping of signal processingappl...
Hardware/software partitioning is a process that occurs frequently in embedded system design. It is ...
This paper presents a new approach for modeling hardware and software tasks in codesign system. The ...
Reconfigurable computing is emerging as a viable design alternative to implement a wide range of com...
Dynamically reconfigurable hardware (DRHW) not only has high silicon reusability, but it can also de...
We consider the problem of scheduling the operations of a data flow graph in a reconfigurable comput...
AbstractIn Dynamic Data-Driven Application Systems, applications must dynamically adapt their behavi...
This paper describes how static task-scheduling methods using stochastic search techniques can be ap...
This paper proposes new scheduling and 2D placement heuristics for partially dynamically reconfigura...
The introduction of high-performance applications such as multimedia applications into SoCs led the ...
A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. ...
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and so...
A central task in high-level synthesis isscheduling: the allocationof operations to clock cycles. Th...
HW/SW codesign and Reconfigurable Computing are commonly used methodologies for digital systems desi...
Many reconfigurable architectures offer partial dynamic configura-bility, but current system-level t...
This poster presentation outlines a proposed framework for handling mapping of signal processingappl...
Hardware/software partitioning is a process that occurs frequently in embedded system design. It is ...
This paper presents a new approach for modeling hardware and software tasks in codesign system. The ...
Reconfigurable computing is emerging as a viable design alternative to implement a wide range of com...
Dynamically reconfigurable hardware (DRHW) not only has high silicon reusability, but it can also de...
We consider the problem of scheduling the operations of a data flow graph in a reconfigurable comput...
AbstractIn Dynamic Data-Driven Application Systems, applications must dynamically adapt their behavi...
This paper describes how static task-scheduling methods using stochastic search techniques can be ap...
This paper proposes new scheduling and 2D placement heuristics for partially dynamically reconfigura...
The introduction of high-performance applications such as multimedia applications into SoCs led the ...
A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. ...
Frequency interleaving is introduced as a means of conceptualizing and co-scheduling hardware and so...
A central task in high-level synthesis isscheduling: the allocationof operations to clock cycles. Th...