This paper describes an algorithmic A D converter which employs digital error correction and self-calibration. In an algorithmic A/D converter, variety of errors including capacitor mismatch, charge injection, and comparator offset
This paper describes a technique for digital error correction in pipelined analog-digital converters...
The linearity of a high-resolution pipelined analog-to-digital converter (ADC) is mainly limited by ...
IEEE International Symposium on Circuits and Systems, pp. 232 – 235, Seattle, EUAThis paper describe...
In this paper, a combined digital foreground self-calibration algorithm is designed to calibrate the...
International audienceA foreground digital calibration technique for pipelined ADC is proposed which...
This thesis provides a novel continuous calibration technique for pipelined Analog-to- Digital Conve...
Abstract — Capacitor mismatch is the main source of nonlinearity for pipelined analog-to-digital (A/...
Abstract—This paper describes a digital-domain self-calibration technique for multistage pipelined a...
Due to the character of the original source materials and the nature of batch digitization, quality ...
A well known problem of time-interleaved analogto-digital converters is the matching between the ind...
Abstract—This work presents a self-calibration algorithm that corrects the linearity errors of pipel...
With the rapid growth of powerful digital algorithms in communications and control technology, it is...
Monolithic A/D and D/A converters suffer from the limited accuracy of the available circuit componen...
An analog-to-digital converter (ADC) is a link between the analog and digital domains and plays a vi...
This paper describes a 14-bit 2OMSPS switched-capacitor Stage Stae21- tSage N pipelined ADC that emp...
This paper describes a technique for digital error correction in pipelined analog-digital converters...
The linearity of a high-resolution pipelined analog-to-digital converter (ADC) is mainly limited by ...
IEEE International Symposium on Circuits and Systems, pp. 232 – 235, Seattle, EUAThis paper describe...
In this paper, a combined digital foreground self-calibration algorithm is designed to calibrate the...
International audienceA foreground digital calibration technique for pipelined ADC is proposed which...
This thesis provides a novel continuous calibration technique for pipelined Analog-to- Digital Conve...
Abstract — Capacitor mismatch is the main source of nonlinearity for pipelined analog-to-digital (A/...
Abstract—This paper describes a digital-domain self-calibration technique for multistage pipelined a...
Due to the character of the original source materials and the nature of batch digitization, quality ...
A well known problem of time-interleaved analogto-digital converters is the matching between the ind...
Abstract—This work presents a self-calibration algorithm that corrects the linearity errors of pipel...
With the rapid growth of powerful digital algorithms in communications and control technology, it is...
Monolithic A/D and D/A converters suffer from the limited accuracy of the available circuit componen...
An analog-to-digital converter (ADC) is a link between the analog and digital domains and plays a vi...
This paper describes a 14-bit 2OMSPS switched-capacitor Stage Stae21- tSage N pipelined ADC that emp...
This paper describes a technique for digital error correction in pipelined analog-digital converters...
The linearity of a high-resolution pipelined analog-to-digital converter (ADC) is mainly limited by ...
IEEE International Symposium on Circuits and Systems, pp. 232 – 235, Seattle, EUAThis paper describe...