A methodology for architecture exploration and performance analysis using system level design languages and rapid architecture profiling

The implementation of service-rich, highly interconnected ap-plications and the increasing demand for performance, requires the development of highly optimized and flexible computing plat-forms. However, the tight real-time requirements of such systems, together with constraints on cost and physical size of the devices, results in increased design complexity and system heterogeneity. This creates a large design space. In this paper, we propose a structured approach based on system level specification languages that supports the rapid exploration and performance evaluation of computing platforms, including their middleware components, through simulation of abstract models. Accuracy is achieved through an off-line rapid architecture profiling procedure. We focus on a process network model, which is more suitable to the description of concurrent functions and data-dominated applications than a traditional sequential programming model. We describe the structure of our simulation framework, and use it to evaluate the performance of the lower layers of the UMTS protocol when mapped on Software Defined Radio oriented architectures. I