The high degree of freedom in the design of coarse-grained reconfigurable arrays imposes new challenges to their de-scription and modeling. We introduce an architecture de-scription language targeted to describe coarse-grained re-configurable architecture templates. It comprises innovative key features to allow fast modeling and analysis of such ar-chitectures, namely: representation of processing element array (ir)regularities, and flexible and concise description of interconnection network. We demonstrate that the pro-posed language enables a formal validation of the described template. Finally, we show how we automatically generate a SystemC based simulator of the described architecture. Our results suggest that the semantic and technica...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
For several different reasons, such as changes in the business or technological environment, the con...
Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefi...
Abstract – Coarse-grained reconfigurable architectures have become more attractive with the increasi...
We propose that, in order to meet high computational demands, the application development has to be ...
Increases in the complexity of Coarse Grained Reconfigurable Array (CGRA) architectures have made im...
Coarse-grained reconfigurable architectures can enhance the performance of critical loops and comput...
This paper presents various novel techniques for improving coarse-grained reconfigurable architectur...
The increasing complexity of today’s multimedia and wireless ap-plications is motivating the system ...
Abstract — Mapping applications onto reconfigurable architectures can be done in many different ways...
In this paper, we introduce an architecture description language for modeling, simulation, and evalu...
Many academic works in computer engineering focus on reconfigurable architectures and associated too...
With the increasing requirements of more flexibility and higher performance in embedded systems desi...
Reconfigurable computing architectures allow the adaptation of the underlying datapath to the algori...
Reconfigurable Arrays combine the benefit of spatial execution, typical of hardware solutions, with ...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
For several different reasons, such as changes in the business or technological environment, the con...
Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefi...
Abstract – Coarse-grained reconfigurable architectures have become more attractive with the increasi...
We propose that, in order to meet high computational demands, the application development has to be ...
Increases in the complexity of Coarse Grained Reconfigurable Array (CGRA) architectures have made im...
Coarse-grained reconfigurable architectures can enhance the performance of critical loops and comput...
This paper presents various novel techniques for improving coarse-grained reconfigurable architectur...
The increasing complexity of today’s multimedia and wireless ap-plications is motivating the system ...
Abstract — Mapping applications onto reconfigurable architectures can be done in many different ways...
In this paper, we introduce an architecture description language for modeling, simulation, and evalu...
Many academic works in computer engineering focus on reconfigurable architectures and associated too...
With the increasing requirements of more flexibility and higher performance in embedded systems desi...
Reconfigurable computing architectures allow the adaptation of the underlying datapath to the algori...
Reconfigurable Arrays combine the benefit of spatial execution, typical of hardware solutions, with ...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
For several different reasons, such as changes in the business or technological environment, the con...
Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefi...