This paper proposes a procedure for minimizing the code size of sequential programs for reactive systems. It identifies repeated code segments (a generalization of basic blocks to di-rected rooted trees) and finds a minimal covering of the input control flow graphs with code segments. The segments are dis-junct, i.e. no two segments have the same code in common. The program is minimal in the sense that the number of code segments is minimum under the property of disjunction for the given control flow specification. The procedure makes no assumption on the target proces-sor architecture, and is meant to be used between task synthe-sis algorithms from a concurrent specification and a standard compiler for the target architecture. It is aimed ...
This paper presents the description of a possible way to build the universal linearized control flow...
Advanced computer architectures rely mainly on compiler optimizations for parallelization, vectoriza...
Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality c...
This paper addresses the problem of efficient code generation for embedded reactive real-time system...
A variety of applications have arisen where it is worthwhile to apply code optimizations directly to...
To exploit instruction level parallelism in programs over multiple basic blocks, programs should hav...
Code size has become an important constraint for applications on mobile devices. Not only should the...
AbstractThe register allocation problem for an imperative program is often modeled as the coloring p...
An implementation-oriented algorithm for lazy code motion is presented that minimizes the number of ...
Software components for embedded reactive real-time appli-cations must satisfy tight code size and r...
Compiler optimizations need precise and scalable analyses to discover program properties. We propose...
Software components for embedded reactive real-time appli-cations must satisfy tight code size and r...
Abstract — Software components for embedded reactive real-time applications must satisfy tight code ...
summary:In this paper we analyze the computational complexity of a processor optimization problem. G...
Embedded system applications can have quite complex control flow graphs (CFGs). Often their control ...
This paper presents the description of a possible way to build the universal linearized control flow...
Advanced computer architectures rely mainly on compiler optimizations for parallelization, vectoriza...
Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality c...
This paper addresses the problem of efficient code generation for embedded reactive real-time system...
A variety of applications have arisen where it is worthwhile to apply code optimizations directly to...
To exploit instruction level parallelism in programs over multiple basic blocks, programs should hav...
Code size has become an important constraint for applications on mobile devices. Not only should the...
AbstractThe register allocation problem for an imperative program is often modeled as the coloring p...
An implementation-oriented algorithm for lazy code motion is presented that minimizes the number of ...
Software components for embedded reactive real-time appli-cations must satisfy tight code size and r...
Compiler optimizations need precise and scalable analyses to discover program properties. We propose...
Software components for embedded reactive real-time appli-cations must satisfy tight code size and r...
Abstract — Software components for embedded reactive real-time applications must satisfy tight code ...
summary:In this paper we analyze the computational complexity of a processor optimization problem. G...
Embedded system applications can have quite complex control flow graphs (CFGs). Often their control ...
This paper presents the description of a possible way to build the universal linearized control flow...
Advanced computer architectures rely mainly on compiler optimizations for parallelization, vectoriza...
Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality c...