Chapter 3 A low-power portable H.264/AVC decoder using elastic pipeline

Abstract. We propose an elastic pipeline architecture that can apply dynamic voltage scaling (DVS) to a dedicated hardware, and im-plement the elastic pipeline to a portable H.264/AVC decoder LSI with embedded frame buffer SRAM. A supply voltage and operat-ing frequency are decreased by a feedback-type voltage/frequency control algorithm. In a portable H.264/AVC decoder, embedded SARM can be utilized as frame buffer since the frame buffer is not so large that an external DRAM is required. In the proposed pipeline architecture, the power in the embedded SRAM and even in a local bus connecting with the frame buffer SRAM can be controlled by DVS. We carried out simulation in the 320 × 180 pixels baseline profile and 320 × 240 pixels mail profile. The total power reduction in 320 × 180 pixels and 320 × 240 pixels are 30 % and 31%, respec-tively