System level simulators allow computer architects and system software designers to recreate an accurate and complete replica of the program behavior of a target system, regardless of the availability, existence, or in-strumentation support of such a system. Applications include evaluation of architectural design alternatives as well as software engineering tasks such as traditional debugging and performance tuning. We present an implementation of a simulator acting as a virtual workstation fully compatible with the sun4m architecture from Sun Microsystems. Built using the system-level SPARC V8 simulator SimICS, SimICS/sun4m models one or more SPARC V8 proces-sors, supports user-developed modules for data cach
We present an extension to an existing SPARC V8 in-struction set simulator, SimICS, to support accur...
The fascinating growth of Multi-Processor System-on-Chip (MPSoC) has brought a daunting task to soft...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...
Annual Technical Conference. all rights reserved. System level simulators allow computer architects ...
System level simulators allow computer architects and system software designers to recreate an accur...
An implementation of a system level interpreter of the SPARC V8 instruction set architecture is desc...
In this paper we present work in progress in the development of a complete machine simulator for the...
Virtual platforms are finding widespread use in both pre- and post-silicon computer software and sys...
Instruction-set simulators allow programmers a detailed level of insight into, and control over, the...
Instruction-set simulators allow programmers a detailed level of insight into, and control over, the...
In this paper we present Solemn, a new user-level simulation mode for Sparc Sulima, a SPARC V9 compl...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...
International audienceThe development of embedded systems requires the development of increasingly c...
International audienceThe development of embedded systems requires the development of increasingly c...
Architectural heterogeneity has proven to be an effective design paradigm to cope with an ever-incre...
We present an extension to an existing SPARC V8 in-struction set simulator, SimICS, to support accur...
The fascinating growth of Multi-Processor System-on-Chip (MPSoC) has brought a daunting task to soft...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...
Annual Technical Conference. all rights reserved. System level simulators allow computer architects ...
System level simulators allow computer architects and system software designers to recreate an accur...
An implementation of a system level interpreter of the SPARC V8 instruction set architecture is desc...
In this paper we present work in progress in the development of a complete machine simulator for the...
Virtual platforms are finding widespread use in both pre- and post-silicon computer software and sys...
Instruction-set simulators allow programmers a detailed level of insight into, and control over, the...
Instruction-set simulators allow programmers a detailed level of insight into, and control over, the...
In this paper we present Solemn, a new user-level simulation mode for Sparc Sulima, a SPARC V9 compl...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...
International audienceThe development of embedded systems requires the development of increasingly c...
International audienceThe development of embedded systems requires the development of increasingly c...
Architectural heterogeneity has proven to be an effective design paradigm to cope with an ever-incre...
We present an extension to an existing SPARC V8 in-struction set simulator, SimICS, to support accur...
The fascinating growth of Multi-Processor System-on-Chip (MPSoC) has brought a daunting task to soft...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...