Add to ORKGAbstract — The body-tied FinFETs (bulk FinFETs) implemented on bulk Si substrate were characterized through 3-dimensional device simulation. By controlling the doping profile along the vertical fin body, the bulk FinFETs can be scaled down to sub-30 nm. Device characteristics with the body shape were also shown. At a contact resistivity of 1 ´ 10-7 W cm2, the device with side metal contact of fin source/drain showed higher drain current by about two. The C-V results were also shown for the first time
This work presents the technological development and characterization of n-channel fully depleted hi...
Dual gate MOSFET structures such as FinFETs are widely regarded as the most promising option for con...
Using embedded SRAM as a path, FinFET may enter manufacturing at 32nm. FinFET provides several advan...
Fabrication of FinFETs using bulk CMOS instead of silicon on insulator (SOI) technology is of utmost...
FinFETs are the leading candidates for sub 32nm technology node owing to their increased immunity to...
A new body-on-insulator (BOI) FinFET device structure based on bulk-Si substrate has been proposed a...
The goal of this work is to develop the processes needed for the demonstration of a fully-depleted (...
Crystalline silicon source/drain FInFET structures were designed, fabricated, and tested at the RIT ...
DoctorThe development of silicon planar technology over the past half-century has been one of the mo...
Tremendous progress in information technology has been made possible by the development and optimiza...
The Semiconductor industry has excelled the electronics market in providing high speed, power effici...
This study aims to understand the potential of bulk FinFET technology from the perspective of sub-an...
This study aims to understand the potential of bulk FinFET technology from the perspective of sub- a...
Abstract – Crystallographic silicon etching with TMAH is employed on (110) bulk silicon wafers for t...
Superior scalability and better gate-to-channel capacitive coupling can be achieved with adopting ga...
This work presents the technological development and characterization of n-channel fully depleted hi...
Dual gate MOSFET structures such as FinFETs are widely regarded as the most promising option for con...
Using embedded SRAM as a path, FinFET may enter manufacturing at 32nm. FinFET provides several advan...
Fabrication of FinFETs using bulk CMOS instead of silicon on insulator (SOI) technology is of utmost...
FinFETs are the leading candidates for sub 32nm technology node owing to their increased immunity to...
A new body-on-insulator (BOI) FinFET device structure based on bulk-Si substrate has been proposed a...
The goal of this work is to develop the processes needed for the demonstration of a fully-depleted (...
Crystalline silicon source/drain FInFET structures were designed, fabricated, and tested at the RIT ...
DoctorThe development of silicon planar technology over the past half-century has been one of the mo...
Tremendous progress in information technology has been made possible by the development and optimiza...
The Semiconductor industry has excelled the electronics market in providing high speed, power effici...
This study aims to understand the potential of bulk FinFET technology from the perspective of sub-an...
This study aims to understand the potential of bulk FinFET technology from the perspective of sub- a...
Abstract – Crystallographic silicon etching with TMAH is employed on (110) bulk silicon wafers for t...
Superior scalability and better gate-to-channel capacitive coupling can be achieved with adopting ga...
This work presents the technological development and characterization of n-channel fully depleted hi...
Dual gate MOSFET structures such as FinFETs are widely regarded as the most promising option for con...
Using embedded SRAM as a path, FinFET may enter manufacturing at 32nm. FinFET provides several advan...