Advances In Processing of Compound Semiconductor Substrates

Compound semiconductor materials such as GaAs and InP have distinct advantages over the more traditional sili-con, chief of which is the greater electron mobility within the substrate, allowing greater use in low-noise, high gain applications. However, the advantages of these materials come with corresponding disadvantages. As these materi-als become attractive for high power applications, they become less suited for one of the major byproducts of this application – heat. In contrast to silicon, these materials have a much lower thermal conductivity, which leads to the primary method of heat management – wafer thinning. In order to manage the heat, these materials will first be thinned (to minimize the overall thermal resistance), and then patterned with backside metallized vias [1], which serve both as heat sinks, and as a grounding back plane for the circuitry of the device. This paper discusses recent advances in production technologies intended to address the challenges presented by this process, and allow for high yield manufacturing. First, the challenge of handling these fragile thinned sub-strates for the required post thinning processes of lithogra-phy, etch, and metallization will be discussed. Then, ad-vances in lithography technologies for the alignment and patterning of the vias will be explored. Finally, new proc-esses for compound semi technologies – spray coating and plasma assisted direct wafer bonding – will be presented