The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Archi-tectural Vulnerability Factor (AVF) reflects the possibil-ity that a transient fault eventually causes a visible error in the program output, and it indicates a system’s sus-ceptibility to transient faults. Therefore, the awareness of the AVF especially at early design stage is greatly helpful to achieve a trade-off between system perform-ance and reliability. However, tracking the AVF during program execution is extremely costly, which makes accurate AVF prediction extraordinarily attractive to computer architects. In this paper, we propose to use Boosted Regression Trees, a nonpar...
Soft errors are a growing concern for processor reliability. Recent work has motivated architecture ...
The quantitative evaluation of certain quality attributes— performance, timeliness, and reliability—...
Abstract—The microarchitectural design space of a new processor is too large for an architect to eva...
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Tech...
Soft error reliability has become a first-order design criterion for modern microprocessors. Archite...
Abstract—Soft Errors have emerged as a key challenge to microprocessor design. Traditional soft erro...
Reliability to soft errors is a significant design challenge in modern microprocessors owing to an e...
Aggressive technology scaling is increasing the impact of soft errors on microprocessor reliability....
Abstract—Reliability is an important design constraint in modern microprocessors, and one of the fun...
Modern architectures provide access to many hardware performance events, which are capable of provid...
Reliability is becoming a major design concern in contemporary microprocessors since soft error rate...
Applications may have unintended performance problems in spite of compiler optimizations, because of...
This paper presents a first-order analytical model for determining the performance degradation cause...
With shrinking process technology, the primary cause of transient faults in semiconductors shifts aw...
We present Value Prediction for Security (VPsec), a novel hardware-only framework to counter fault a...
Soft errors are a growing concern for processor reliability. Recent work has motivated architecture ...
The quantitative evaluation of certain quality attributes— performance, timeliness, and reliability—...
Abstract—The microarchitectural design space of a new processor is too large for an architect to eva...
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Tech...
Soft error reliability has become a first-order design criterion for modern microprocessors. Archite...
Abstract—Soft Errors have emerged as a key challenge to microprocessor design. Traditional soft erro...
Reliability to soft errors is a significant design challenge in modern microprocessors owing to an e...
Aggressive technology scaling is increasing the impact of soft errors on microprocessor reliability....
Abstract—Reliability is an important design constraint in modern microprocessors, and one of the fun...
Modern architectures provide access to many hardware performance events, which are capable of provid...
Reliability is becoming a major design concern in contemporary microprocessors since soft error rate...
Applications may have unintended performance problems in spite of compiler optimizations, because of...
This paper presents a first-order analytical model for determining the performance degradation cause...
With shrinking process technology, the primary cause of transient faults in semiconductors shifts aw...
We present Value Prediction for Security (VPsec), a novel hardware-only framework to counter fault a...
Soft errors are a growing concern for processor reliability. Recent work has motivated architecture ...
The quantitative evaluation of certain quality attributes— performance, timeliness, and reliability—...
Abstract—The microarchitectural design space of a new processor is too large for an architect to eva...