Instructions to the Alpha Architecture

The Alpha Architecture and its initial implementations were limited in their ability to manipulate data values at the byte and word granularity. Instead of allowing single instructions to manipulate byte and word val-ues, the original Alpha Architecture required as many as sixteen instructions. Recently, DIGITAL extended the Alpha Architecture to manipulate byte and word data values with a single instruction. The second gen-eration of the Alpha 21164 microprocessor, operating at 400 megahertz (MHz) or greater, is the first imple-mentation to include the new instructions. This paper presents the results of an analysis of the effects that the new instructions in the Alpha Architecture have on the performance, code size, and dynamic instruction distribution of a consistent execu-tion path through a commercial database. To exercise the database, we modified the Transaction Processing Performance Council’s (TPC) obsolete TPC-B bench-mark. Although it is no longer a valid TPC bench-mark, the TPC-B benchmark, along with other TPC benchmarks, has been widely used to study database performance.1–5 We began our project by rebuilding Microsoft Corporation’s SQL Server product to use the new Alpha instructions. We proceeded to conduct a static code analysis of the resulting images and dynamic link libraries (DLLs). The focus of the study was to investi-gate the impact that the new instructions had upon a large application and not their impact upon the oper-ating system. To this end, we did not rebuild the Windows NT operating system to use the new byte and word instructions. We measured the dynamic effects by gathering instruction and function traces with several profiling and image analysis tools. The results indicate that the Microsoft SQL Server product benefits from the additional byte and word instructions to the Alpha microprocessor. Our measurements of the images and DLLs show a decrease in code size, ranging from neg-ligible to almost 9 percent. For the cached TPC-B transactions, the number of instructions executed per transaction decreased from 111,288 to 106,521 (a 4 percent reduction). For the scaled TPC-B trans-actions, the number of instructions executed pe