Second Prototype Silicon Sensor Specifications for LC R&D

Please see recent conference papers[1] or talks [2] for further background on the application of these detectors to elementary particle physics and the Linear Collider (LC) project. We plan to build a detector system for the LC which will use on order of 10 million cm2 of silicon sensors. Each individual sensor will be of a size approximately given by the largest readily available silicon wafer, subject to economic considerations. For the second prototype sensors we plan to base our design on 6 inch wafers. These sensors will be subdivided into individual detector elements which we call pixels. We are developing a readout chip called “KPiX ” with 1024 readout channels and we propose to divide the useable area of the silicon sensors into 1024 pixels. The KPiX chip is to be mounted directly to the silicon sensor using the bump-bonding technique. The KPiX chip will amplify, shape, buffer and digitize the input signals. Besides the inputs, the external connections to the KPiXs are only the few required for power, control, and for the serialized digital output. By integrating the detector readout in this way, we hope to control the cost and complexity of the project. 2 Sensor Layout Figure 1 shows the suggested layout of pixels on a 6 inch (150mm) wafer. The wafer has been cut into a hexagon with the vertices removed. We plan to assemble a detector module by placing suc