Task Scheduling for Reliable Cache Architectures of Multiprocessor Systems

This paper presents a task scheduling method for reli-able cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for re-ducing the usage of vulnerable SRAMs under real-time con-straints. A mixed integer programming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that our task scheduling method achieved 47.7-99.9 % less vulnerability than a con-ventional approach.