Multi-Processor SystemLevel Synthesis for Multiple Applications on Platform FPGA

Multiprocessor systems-on-chip (MPSoC) are being devel-oped in increasing numbers to support the high number of applications running on modern embedded systems. De-signing and programming such systems prove to be a major challenge. Most of the current design methodologies rely on creating the design by hand, and are therefore error-prone and time-consuming. This also limits the number of design points that can be explored. While some efforts have been made to automate the flow and raise the abstraction level, these are still limited to single-application designs. In this paper, we present a design methodology to gen-erate and program MPSoC designs in a systematic and au-tomated way for multiple applications. The architecture is automatically inferred from the application specifications, and customized for it. The flow is ideal for fast design space exploration (DSE) in MPSoC systems. We present results of a case study to compute the buffer-throughput trade-offs in real-life applications, H263 and JPEG decoders. The gener-ation of the entire project takes about 100ms, and the whole DSE was completed in 45 minutes, including the FPGA mapping and synthesis. 1