Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Various coding schemes have been proposed in literature to encode the input signal in order to reduce the number of transitions. Number of transitions can be reduced by introducing redundancy in data transferred over the busses. For a given amount of redundancy there exists a lower bound on the average number of transitions. In this paper we de-rive a new coding scheme which leads to extremely practical tech-niques for bus transmission that reduce bus transitions to within 3:96-8:42 % of the lower bound depending on the redundancy em-ployed. There is also a net reduction in power dissipation rang-ing from 8:53-21:88 % over an uncoded bus transmi...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
The dynamic power management (DPM) represents an important challenge for extending the battery lifet...
The power dissipated by system-level buses is the largest contribution to the global power of compl...
Low power VLSI circuit design is one of the most important issues in present day technology. One of ...
Abstruct- Technology trends and especially portable applications drive the quest for low-power VLSI ...
<p>Multiplexing parallel busses into serial links has been proposed for its advantages such as reduc...
This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology...
Now a day’s VLSI has become the backbone of all types of designs. Interconnect plays an increasing r...
[[abstract]]In this paper, we propose a bus encoding scheme to minimize coupling effects which cause...
In this paper we propose a coding scheme for general-purpose applications that can reduce power diss...
Dynamic power dissipation on I/O buses is an important issue for high-speed communication between ch...
We present a partial bus-invert coding scheme for power optimization of system level bus. In the pro...
Interconnects on deep submicron (DSM) buses incur significantly larger power dissipation, delay perf...
Power dissipation is an important design constraint in today’s CMOS VLSI design and is addressed wid...
The power dissipated by system-level buses is the largest contribution to the global power of comple...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
The dynamic power management (DPM) represents an important challenge for extending the battery lifet...
The power dissipated by system-level buses is the largest contribution to the global power of compl...
Low power VLSI circuit design is one of the most important issues in present day technology. One of ...
Abstruct- Technology trends and especially portable applications drive the quest for low-power VLSI ...
<p>Multiplexing parallel busses into serial links has been proposed for its advantages such as reduc...
This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology...
Now a day’s VLSI has become the backbone of all types of designs. Interconnect plays an increasing r...
[[abstract]]In this paper, we propose a bus encoding scheme to minimize coupling effects which cause...
In this paper we propose a coding scheme for general-purpose applications that can reduce power diss...
Dynamic power dissipation on I/O buses is an important issue for high-speed communication between ch...
We present a partial bus-invert coding scheme for power optimization of system level bus. In the pro...
Interconnects on deep submicron (DSM) buses incur significantly larger power dissipation, delay perf...
Power dissipation is an important design constraint in today’s CMOS VLSI design and is addressed wid...
The power dissipated by system-level buses is the largest contribution to the global power of comple...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
The dynamic power management (DPM) represents an important challenge for extending the battery lifet...
The power dissipated by system-level buses is the largest contribution to the global power of compl...