Reducing translation lookaside buffer active power

Lowering active power dissipation is increasingly important for battery powered embedded microprocessors. Here, power reduction techniques applicable to fully associative translation lookaside buffers, as well as other associative structures and dynamic register files, are described. Powermill simulations of implementation in a microprocessor on 0.18µm process technology demonstrate 42 % power savings. Circuit implementations, as well as architectural simulations demonstrating applicability to typical instruction mixes are shown