Accelerated Bit Error Rate Measurement Technique for Gigabit Link Power Optimization

Abstract — With the need for decreased power consumption as link speeds have increased in this paper we propose a method of power saving using bit error rate (BER) measurement of the link. As of now, only wireless links have used BER as a metric for power optimization because the error rate for wired links is 5-10 orders of magnitude lower thus requiring a very long time to complete a BER measurement. An improved accelerated BER technique is used to bring the measurement time down to a manageable level. The accelerated technique is compared to existing methods in terms of ease of applicability to current low power link technology such as a current-sense low-swing architecture. For short haul interconnects, low-swing links are becoming a viable replacement for LVDS or CML. The current mode operation of low-swing links is well suited for applying the power saving methodology. The presented low-swing architecture enables faster speeds and lower power consumption over its predecessor. Experimental results are shown for the power optimization methodology applied to the current-sense differential low swing link. I