In this paper we present and evaluate the SPADE (System level Performance Analysis and Design space Exploration) methodol-ogy through an illustrative case study. SPADE is a method and tool for architecture exploration of heterogeneous signal process-ing systems. In this case study we start from an M-JPEG ap-plication and use SPADE to evaluate alternative multi-processor architectures for implementing this application. SPADE follows the Y-chart paradigm for system level design; application and ar-chitecture are modeled separately and mapped onto each other in an explicit design step. SPADE permits architectures to be modeled at an abstract level using a library of generic building blocks, thereby reducing the cost of model construction and s...
In this thesis, we provide a synthesizable model for supporting design space exploration of applicat...
International audienceThis article presents a new methodology to rapidly explore the large design sp...
Abstract—In the system-level design of MPSoCs (Multi-Processor System-on-a-Chips), system designers ...
In this paper we present and evaluate the SPADE (System level Performance Analysis and Design space ...
Abstract — We present a methodology for the exploration of signal processing architectures at the sy...
Abstract—In the PROGRESS Artemis project [1] an architecture work-bench is being developed. A case s...
This paper presents a system level design flow which enables rapid design space exploration and a ve...
International audienceIn this paper, we describe a methodology and flow for systematic design of app...
To implement chip design on a satisfactory target architecture, more architecture exploration should...
Multi-processor system-on-chip (MPSoC) design is profiting considerably from the trend towards model...
SPADE is an integrated system for application and program development on parallel architectures with...
Abstract: Integration of increasingly complex systems on a chip augments the need of system-level me...
This paper presents an environment based on SystemC for architecture specification of programmable s...
Incorporating algorithm and architecture level design space exploration in the early phases of the d...
We present a case study on the design of a heterogeneous archi-tecture for MPEG-2 video decoding. Th...
In this thesis, we provide a synthesizable model for supporting design space exploration of applicat...
International audienceThis article presents a new methodology to rapidly explore the large design sp...
Abstract—In the system-level design of MPSoCs (Multi-Processor System-on-a-Chips), system designers ...
In this paper we present and evaluate the SPADE (System level Performance Analysis and Design space ...
Abstract — We present a methodology for the exploration of signal processing architectures at the sy...
Abstract—In the PROGRESS Artemis project [1] an architecture work-bench is being developed. A case s...
This paper presents a system level design flow which enables rapid design space exploration and a ve...
International audienceIn this paper, we describe a methodology and flow for systematic design of app...
To implement chip design on a satisfactory target architecture, more architecture exploration should...
Multi-processor system-on-chip (MPSoC) design is profiting considerably from the trend towards model...
SPADE is an integrated system for application and program development on parallel architectures with...
Abstract: Integration of increasingly complex systems on a chip augments the need of system-level me...
This paper presents an environment based on SystemC for architecture specification of programmable s...
Incorporating algorithm and architecture level design space exploration in the early phases of the d...
We present a case study on the design of a heterogeneous archi-tecture for MPEG-2 video decoding. Th...
In this thesis, we provide a synthesizable model for supporting design space exploration of applicat...
International audienceThis article presents a new methodology to rapidly explore the large design sp...
Abstract—In the system-level design of MPSoCs (Multi-Processor System-on-a-Chips), system designers ...