The coupling capacitances between on-chip bus lines become dominant in deep-submicron technologies. Coding to reduce the switching activity of the individual lines was enough to reduce power on buses in older technologies, but new coding techniques that reduce the coupling activity between lines are needed for deep-submicron buses. One such coding technique uses the simple observation that coupling capacitances are always charged and discharged by activity on neighboring bus lines, where one line has an odd number and the other has an even number (if bus lines are numbered “in-order”). We thus propose to reduce the coupling activity by independently controlling the odd and even bus lines with two separate lines, the Odd Invert, and Even Inv...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
ABSTRACT: Charge recycling has been proposed as a strategy to reduce the power dissipation in data b...
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Var...
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and sy...
This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology...
[[abstract]]In this paper, we propose a bus encoding scheme to minimize coupling effects which cause...
Dynamic power dissipation on I/O buses is an important issue for high-speed communication between ch...
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and sy...
In this paper we present a simplified model for deep submicron, on-chip, parallel data buses. Using ...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
Abstract—Theoretical analysis of bus-invert coding for reducing switching activity was previously in...
The power dissipated by Deep Sub-Micron Technology bus is directly related to the switching activity...
Abstruct- Technology trends and especially portable applications drive the quest for low-power VLSI ...
We present a partial bus-invert coding scheme for power optimization of system level bus. In the pro...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
ABSTRACT: Charge recycling has been proposed as a strategy to reduce the power dissipation in data b...
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Var...
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and sy...
This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology...
[[abstract]]In this paper, we propose a bus encoding scheme to minimize coupling effects which cause...
Dynamic power dissipation on I/O buses is an important issue for high-speed communication between ch...
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and sy...
In this paper we present a simplified model for deep submicron, on-chip, parallel data buses. Using ...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
Abstract—Theoretical analysis of bus-invert coding for reducing switching activity was previously in...
The power dissipated by Deep Sub-Micron Technology bus is directly related to the switching activity...
Abstruct- Technology trends and especially portable applications drive the quest for low-power VLSI ...
We present a partial bus-invert coding scheme for power optimization of system level bus. In the pro...
In very deep sub-micron designs, cross coupling capacitances become the dominant factor of the total...
ABSTRACT: Charge recycling has been proposed as a strategy to reduce the power dissipation in data b...
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Var...