A new vector processor architecture for high performance signal processing

The continous and fast development in communication tech-nology demands high exibility and short product cycles. In addition, demanding signal processing algorithms often ex-ceed the performance of available digital signal processor (DSP) cores. This paper introduces a novel vector signal processor architecture that can achieve these processing and exibility demands. In contrast to traditional vector proces-sors, our design improves the utilization of scalar algorithms. 1