TxLinux is a variant of Linux that is the first operating system to use hardware transactional memory (HTM) as a synchronization primitive, and the first to manage HTM in the scheduler. This paper describes and measures TxLinux and discusses two innovations in detail: cooperation between locks and transactions, and the integra-tion of transactions with the OS scheduler. Mixing locks and trans-actions requires a new primitive, cooperative transactional spin-locks (cxspinlocks) that allow locks and transactions to protect the same data while maintaining the advantages of both synchroniza-tion primitives. Cxspinlocks allow the system to attempt execution of critical regions with transactions and automatically roll back to use locking if the re...
The recent trend of multicore CPUs pushes for major changes in software development. Traditional sin...
The advent of multi-core and multi-threaded processor architectures highlights the need to address t...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...
This paper quantifies the effect of architectural design decisions on the performance of TxLinux. Tx...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
There has been a flurry of recent work on the design of high performance software and hybrid hardwar...
Transactional Memory (TM) aims to make shared memory parallel programming easier by abstracting away...
Transactional memory (TM) systems have gained considerable popularity in the last decade driven by t...
Transactional memory (TM) systems have gained considerable popularity in the last decade driven by t...
textTransactional memory (TM) aims to bring the benefits of ACID transactions to the volatile world ...
There has been considerable recent interest in the support of transactional memory (TM) in both hard...
Transactional Memory (TM) is a compel ling alternative to locks as a general-purpose concurrency c...
Transactional memory presents a new concurrency control mechanism to handle synchronization between ...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
The aim of a software transactional memory (STM) system is to facilitate the design of concurrent pr...
The recent trend of multicore CPUs pushes for major changes in software development. Traditional sin...
The advent of multi-core and multi-threaded processor architectures highlights the need to address t...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...
This paper quantifies the effect of architectural design decisions on the performance of TxLinux. Tx...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
There has been a flurry of recent work on the design of high performance software and hybrid hardwar...
Transactional Memory (TM) aims to make shared memory parallel programming easier by abstracting away...
Transactional memory (TM) systems have gained considerable popularity in the last decade driven by t...
Transactional memory (TM) systems have gained considerable popularity in the last decade driven by t...
textTransactional memory (TM) aims to bring the benefits of ACID transactions to the volatile world ...
There has been considerable recent interest in the support of transactional memory (TM) in both hard...
Transactional Memory (TM) is a compel ling alternative to locks as a general-purpose concurrency c...
Transactional memory presents a new concurrency control mechanism to handle synchronization between ...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
The aim of a software transactional memory (STM) system is to facilitate the design of concurrent pr...
The recent trend of multicore CPUs pushes for major changes in software development. Traditional sin...
The advent of multi-core and multi-threaded processor architectures highlights the need to address t...
Hardware Transactional Memory (TM) attempts to deliver on the promises made with Software Transactio...