Power-Saving Hybrid CAMs for Parallel IP lookups

Abstract — IP lookup with the longest prefix match is a core function of Internet routers. Partitioned Ternary Con-tent Addressable Memory (TCAM)-based search engines have been widely used for parallel lookups despite power inefficiency. In this paper, to achieve a higher throughput and power-efficient IP lookup, we introduce hybrid CAM (HCAM) architecture with SRAM. In our approach, we break a prefix into a collapsed prefix in CAM and a stride in SRAM. This prefix collapse reduces the number of prefixes that results in reduced memory usage by a factor of 2.8. High throughput is achieved by storing the collapsed prefixes in partitioned CAMs. Our record for 2 BGP tables shows that an HCAM saves 3.6 times energy consumption compared to the TCAM based implementation. I