Digital's Alpha-based DECchip 21 164 processor was verified extensively prior to fabrication of silicon. This simulation-based verification effort used implementation-directed, pseudorandom excrchsers which were supplemented with implementation-specific, hand-generated tests. Special emphasis was placed on the tasks of checking for correct operation and functional wverage analysis. Coverage analysis shows where testing is incomplete, under the assumption that untested logic often contains bugs. Correctness checkers are various mechanisms (both during and after simulation) that monitor a test to detennine if it was successful. This paper details the coverage analysis and correctness checking techniques that were used. We show how our me...
Over the past four decades microprocessors have come to be a vital and inseparable part of the moder...
International audienceIn this paper we report about a case study on the functional verification of a...
Many approaches have been proposed for digital system verification, either based on simulation strat...
Digital's Alpha-based DECchip 21164 processor was verified extensively prior to fabrication of ...
We describe a technique for verifying that a hardware design correctly implements a protocol-level f...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
Abstract. We describe the techniques we have used to search for bugs in the memory subsystem of a ne...
Verification of microprocessors is a vital phase in their development. It takes majority of time and...
Building a high-performance microprocessor presents many reliability challenges. De-signers must ver...
We describe a technique for verifying that a hardware design correctly implements a protocol. The ap...
the system using test programs executed by the PU. These test programs are often generated by advanc...
Correct concurrent System-on-Chips (SoCs) are very hard to design and reason about. In this work, we...
A single node of a modern scalable multiprocessor consists of several ASICs comprising tens of milli...
A logic simulator can prove the correctness of a digital circuit if it can be shown that only circui...
Functional verification of RTL is one of the primary and most time consuming tasks of microprocessor...
Over the past four decades microprocessors have come to be a vital and inseparable part of the moder...
International audienceIn this paper we report about a case study on the functional verification of a...
Many approaches have been proposed for digital system verification, either based on simulation strat...
Digital's Alpha-based DECchip 21164 processor was verified extensively prior to fabrication of ...
We describe a technique for verifying that a hardware design correctly implements a protocol-level f...
The study on verification trends in the semiconductor industry shows that the design complexity is i...
Abstract. We describe the techniques we have used to search for bugs in the memory subsystem of a ne...
Verification of microprocessors is a vital phase in their development. It takes majority of time and...
Building a high-performance microprocessor presents many reliability challenges. De-signers must ver...
We describe a technique for verifying that a hardware design correctly implements a protocol. The ap...
the system using test programs executed by the PU. These test programs are often generated by advanc...
Correct concurrent System-on-Chips (SoCs) are very hard to design and reason about. In this work, we...
A single node of a modern scalable multiprocessor consists of several ASICs comprising tens of milli...
A logic simulator can prove the correctness of a digital circuit if it can be shown that only circui...
Functional verification of RTL is one of the primary and most time consuming tasks of microprocessor...
Over the past four decades microprocessors have come to be a vital and inseparable part of the moder...
International audienceIn this paper we report about a case study on the functional verification of a...
Many approaches have been proposed for digital system verification, either based on simulation strat...