1Bus Serialization for Reducing Power Consumption

Shared-bus chip multiprocessors require buses with long wires. The portion of power consumed in wires relatively increases with device scaling. In this paper, we advocate the use of bus serialization to reduce bus power consumption. Bus serialization decreases the number of wires, and increases the pitch between wires. The wider pitch decreases the coupling capacitances of wires, and consequently reduces bus power consumption. Evaluation results indicate that our technique can reduce bus power consumption by 30 % at 45nm technology process. 1