Optimizing the Design of a Switched-Capacitor Dynamic-Element-Matching Amplifier

Abstract: In this paper an optimization on recently designed switched-capacitor dynamic- element-matching amplifier is presented. The main problem of this circuit is switch-charge injection. The performance of the circuit has been improved by optimum design of the switches (acceptable onR and minimum charge injection) and measuring two different offsets to enable improved auto-calibration. The error voltages have been calculated versus the input voltage and the switch sizes. Optimal values for the switch sizes have been found. For experimental evaluation of the amplifier, a test chip has been designed in 0.7µm standard CMOC technology. Introduction: The main error sources in measurement system are offset and parameters drift by temperature and aging. However by using advanced techniques such as chopping and three-signal method we can get rid off any additive (offset) and multiplicative (gain) uncertainty [6]. It is only possible to design the core processing circuit with a high degree of linearity for a limited input range. Therefore, it is necessary to scale the input signal t