Java Applets Support for an Asynchronous-Mode Learning of Digital Design and Test

Abstract – A system for teaching design and test of digital devices and systems at different levels of design flow is presented. The greater part of the system is intended mainly to illustrate register-transfer level problems in control intensive digital systems such as investigation of trade-offs between the system’s speed and the cost of hardware, control part decomposition, simulation, fault simulation, test generation, built-in self-test, and some others. A conception of training system for teaching the IEEE 1149.1 Boundary Scan standard is presented. The system is implemented in the form of Java applets and can be freely accessed through the Internet. The latter makes it easy for the students to improve their learning records using the opportunities of asynchronous mode of education via the Internet