creased microelectronic device densities and speeds. However, interconnection technology has not ad- imposes hybrid integration schemes with increased vanced proportionally. One of the main reasons is the limited availability of interconnection materials that are compatible with VLSI and electronic pack-aging technologies. The increased wire resistance as a result of smaller feature size, the residual wire capacitance resulting from fringing fields, the aspect ratio of the interconnection wires, and the interwire cross talk are among the main factors that prohibit more significant improvements in electrical intercon-nect performance. Consequently the overall perfor-mance of VLSI systems becomes increasingly dominated by the performance of l...
Cataloged from PDF version of article.Several approaches to three-dimensional integration of convent...
The performance of future generation data processing systems will be set by interconnect limitations...
A comprehensive review of challenges and potential solutions associated with the impact of downscali...
Due to continually shrinking feature sizes, higher clock frequencies, and the simultaneous growth in...
The Information Revolution and enabling era of silicon ul-tralarge-scale integration (ULSI) have spa...
In semiconductor industry, device feature dimension has been continuously scaled down to reduce devi...
After four decades of continuous scaling on the CMOS technology, many innovations have been realized...
[[abstract]]Looks at the materials and thermal alternatives for scaled, next-century VLSI/ULSI inter...
The roots of this book, and of the new research field that it defines, lie in the scaling of VLSI te...
The various arguments for introducing optical interconnections to silicon CMOS chips are summarized,...
The recent electronics revolution has been fueled by the decades-long trend of exponential growth in...
© 2004 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
We show that there is a limit to the total number of bits per second, B, of information that can flo...
The objective of this research is to present a holistic study of the on-chip copper interconnect tec...
The goals of the work presented in this paper were to estimate quantitatively the impact of intercon...
Cataloged from PDF version of article.Several approaches to three-dimensional integration of convent...
The performance of future generation data processing systems will be set by interconnect limitations...
A comprehensive review of challenges and potential solutions associated with the impact of downscali...
Due to continually shrinking feature sizes, higher clock frequencies, and the simultaneous growth in...
The Information Revolution and enabling era of silicon ul-tralarge-scale integration (ULSI) have spa...
In semiconductor industry, device feature dimension has been continuously scaled down to reduce devi...
After four decades of continuous scaling on the CMOS technology, many innovations have been realized...
[[abstract]]Looks at the materials and thermal alternatives for scaled, next-century VLSI/ULSI inter...
The roots of this book, and of the new research field that it defines, lie in the scaling of VLSI te...
The various arguments for introducing optical interconnections to silicon CMOS chips are summarized,...
The recent electronics revolution has been fueled by the decades-long trend of exponential growth in...
© 2004 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
We show that there is a limit to the total number of bits per second, B, of information that can flo...
The objective of this research is to present a holistic study of the on-chip copper interconnect tec...
The goals of the work presented in this paper were to estimate quantitatively the impact of intercon...
Cataloged from PDF version of article.Several approaches to three-dimensional integration of convent...
The performance of future generation data processing systems will be set by interconnect limitations...
A comprehensive review of challenges and potential solutions associated with the impact of downscali...