The integration of Thick Buried Oxide in Silicon

This paper reports on work to develop an integrated fabrication technology called TBOS that enables the use of thick PECVD oxide films (10 to 20 µm thick) within a multi-stack wafer bonded device. The development of TBOS is driven by a need to integrate a two-level interconnect device into a five-level-stack wafer-bonded MEMS microstructure. The PECVD oxide films are characterized and shown to induce a large wafer bow of up to 230 µm for a layer of 10 µm thick, and exhibit cracks for thicknesses greater than 15 µm after the densification process at 1100°C in N2 ambient. A combination of CMP and timed field-etching processes are used to form isolated regions of thick PECVD oxide buried in a planar surface. This microfabrication approach reduces the wafer bow by at least 50 % and allows insulating layers without cracks, hence enabling the development of the high voltage Power MEMS devices