We present techniques to transform scheduled descriptions of control-flow intensive (CFI) designs to facilitate power manage-ment. We investigate the factors that inhibit the application of power management in synthesized register-transfer level (RTL) implemen-tations. Based on these insights, we present transformation tech-niques based on the concepts of variable protection, variable re-naming and re-assignment, and limited controller state memory in-sertion that result in inherently power-managed architectures. Our transformation techniques can be easily used in conjunction with any existing resource sharing algorithm or in the framework of exist-ing high-level synthesis tools. Experimental results on CFI designs indicate reductions of up...
Present Field Programmable Gate Array (FPGA) manufacturers incorporate multi-millions of logic reso...
: The increasing demand for portable computing has elevated power consumption to be one of the most ...
In this paper we illustrate the crucial impact of memory related power consumption on the global sys...
Abstract — In this paper,1 we present a power-management methodology targeted toward high-level synt...
Abstract—One important way to reduce power consumption is to reduce the spurious switching activity ...
In this paper, we describe a comprehensive high-level synthe-sis system for control-flow intensive a...
In this paper, we describe a comprehensive high-level synthesis system for control-flow intensive as...
Abstract – Power consumption and power-related issues have become a first-order concern for most des...
Decisions taken at the earliest steps of the design process may have a significant impact on the cha...
Abstract – Power consumption and power-related issues have become a first-order concern for most des...
High level synthesis is the process of generating register transfer (RT) level designs from behavior...
textWe present a generic proof methodology to automatically prove correctness of design transformati...
Abstract: Power dissipation has become one of the most important constraints in the design of integr...
With the migration to Deep Sub-Micron (DSM) process technologies, the power consumption of a circuit...
Dynamic power management is a design methodology aiming at controlling performance and power levels ...
Present Field Programmable Gate Array (FPGA) manufacturers incorporate multi-millions of logic reso...
: The increasing demand for portable computing has elevated power consumption to be one of the most ...
In this paper we illustrate the crucial impact of memory related power consumption on the global sys...
Abstract — In this paper,1 we present a power-management methodology targeted toward high-level synt...
Abstract—One important way to reduce power consumption is to reduce the spurious switching activity ...
In this paper, we describe a comprehensive high-level synthe-sis system for control-flow intensive a...
In this paper, we describe a comprehensive high-level synthesis system for control-flow intensive as...
Abstract – Power consumption and power-related issues have become a first-order concern for most des...
Decisions taken at the earliest steps of the design process may have a significant impact on the cha...
Abstract – Power consumption and power-related issues have become a first-order concern for most des...
High level synthesis is the process of generating register transfer (RT) level designs from behavior...
textWe present a generic proof methodology to automatically prove correctness of design transformati...
Abstract: Power dissipation has become one of the most important constraints in the design of integr...
With the migration to Deep Sub-Micron (DSM) process technologies, the power consumption of a circuit...
Dynamic power management is a design methodology aiming at controlling performance and power levels ...
Present Field Programmable Gate Array (FPGA) manufacturers incorporate multi-millions of logic reso...
: The increasing demand for portable computing has elevated power consumption to be one of the most ...
In this paper we illustrate the crucial impact of memory related power consumption on the global sys...