Memory Management on Chip-MultiProcessors with on-chip Memories

Abstract — In this paper we study the OS services requirect to efficiently manage on-chip memories in CMPs. CMPs typically include serveral cores connected to on-chip local memories. This architecture presents new challenges to the OS. Local memory elements in CMPs can act as cache memories or as local storage memories. When acting as local storage these local memories can be directly accessed by any core in the system using regular load/store instructions, without requiring any coherence action. Applications might use local memories to contain frequently accessed data. This usage pattern reduces the number of accesses to the main memory and the coherence traffic, improving the system performance. The OS is the software that abstracts and multiplexes hard-ware resources. Thus, applications relay on the OS to schedule the code to the core attached to the local memory where its data is stored. In this paper we discuss that a single address space to ease the programming of applications in heterogenous CMP systems. We also describe the necessary OS services to efficiently manage a single address space heterogenous CMP. I