Implementation of Different Square Root Algorithms

Abstract. This paper presents the operation and the implementation of novel fixed point square root algorithms with an input range of 0 to 1 into CMOS. These algorithms are referred to as non-restoring and restoring algorithm and were compared with a square root implementation into a lookup table (LUT). The power consumption, the area consumption and the propagation delay were investigated and the results of all three algorithms are discussed in relation to their bitwidth for expedient implementation. These results enable hardware designers a fast exploration of the most suitable algorithm for a given application. I