1BDD-based 2-bit Arithmetic Logic Unit on GaAs-based Regular Nanowire Network with Hexagonal Topology

A 2-bit arithmetic logic unit (ALU) was successfully fabricated on a GaAs-based regular nanowire network with hexagonal topology. This fundamental building block of central processing units can be implemented on a regular nanowire network structure with simple circuit architecture based on graphical representation of logic functions using a binary decision diagram and topology control of the graph. The 4-instruction ALU was designed by integrating subgraphs representing each instruction, and the circuitry was implemented by transferring the logical graph structure to a GaAs-based 2nanowire network formed by electron beam lithography and wet chemical etching. A path switching function was implemented in nodes by Schottky wrap gate-control of nanowires. The fabricated circuit integrating 32 node devices exhibits correct output waveforms at room temperature allowing for threshold voltage variation