Embedded Processor Based Fault Injection and SEU Emulation for FPGAs

Abstract—Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip (SoC) implementations. The case studies include embedded hard core and soft core processors which manipulate configuration memory bits to emulate physical and transient faults in the FPGA core in-cluding shorts and opens in programmable interconnect and many different faults in logic resources. The emulated faults are used to evaluate fault detection capabilities of Built-In Self-Test (BIST) approaches, including fault identi-fication capabilities of diagnostic procedures, and to evalu-ate the effect of Single Event Upsets (SEUs), including their detection and correction. Embedded processor based ap-proaches provide significant improvement over previous fault injection techniques and, in turn, enable a more thor-ough analysis of BIST, diagnosis, and SEU mitigation.1 1