for AMBA AXI Sangkwon Na*, Sung Yang**, and Chong-Min Kyung*

Abstract—A system-on-a-chip communication archi-tecture has a significant impact on the performance and power consumption of modern multi-processors system-on-chips (MPSoCs). However, customization of such architecture for a specific application requires the exploration of a large design space. Thus, system designers need tools to rapidly explore and evaluate communication architectures. In this paper we pre-sent the method for application-specific low-power bus architecture synthesis at system-level. Our paper has two contributions. First, we build a bus power model of AMBA AXI bus communication archi-tecture. Second, we incorporate this power model into a low-power architecture exploration algorithm that enables system designers to rapidly explore the target bus architecture. The proposed exploration algorithm reduces power consumption by 20.1 % compared to a maximally connected reduced matrix, and the area is also reduced by 20.2 % compared to the maximally connected reduced matrix. Index Terms—Low power, architecture composition