ECS2003_#886-LERCH RAPID THERMAL SOLID PHASE EPITAXY ANNEALING FOR ULTRA-SHALLOW JUNCTION FORMATION

Technology Roadmap for semiconductors for the source/drain extension junction at the 65-70 nm node and beyond are production of junctions between 10 and 19 nm with sheet resistance values between 760 to 830 ohm/sq. for low parasitic source/drain series resistance [1]. Ultra-shallow 49BF2+ and 11B+ implants (4.5 keV and 500 eV respectively, 1.0⋅1015 cm-2) were implanted at room temperature into 73Ge+ (30 keV, 1.0⋅1015 cm-2) pre-amorphized <100> Si. In contrast to fast spike anneals [2, 3] a simple alternative approach for the formation of ultra-shallow junctions with boron was chosen, consisting of a low-temperature (600-800°C, 5-90 s) solid-phase epitaxial growth process in a standard rapid thermal annealing system with tightly controlled gaseous ambient (NH3, Ar, O2). The advantage of this technique is that boron changes over to the electrically-active substitutional site during the regrowth process while dopant diffusion within the lattice is suppressed/minimized by the low temperature process