Multiprocessor Systems∗

SUMMARY This paper proposes a task scheduling approach for reli-able cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the usage of vul-nerable SRAMs under real-time constraints. A mixed integer program-ming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that our task scheduling ap-proach achieved 47.7-99.9 % less vulnerability than a conventional one