The performance prediction model - a methodology for estimating the performance of an FPGA implementation of an algorithm

Employing FPGAs for computing purposes requires a mapping process. Although this procedure saves sub-stantial development time compared to the physical de-sign of an ASIC, several mappings are almost always needed until the constraints can be met. The Perfor-mance Prediction Model (PPM) is a means to help re-ducing the development time while providing an esti-mation of the performance to be achieved. The estima-tion is based on a preliminary implementation1 only and separates different influences, which improves its portability. The PPM yields an accuracy of about 10% in average and is thus suitable for finding a good im-plementation for starting the actual mapping process.