DEPFET Pixel Vertex Detector for the ILC

DEPFET pixels offer a unique possibility for a high resolution pixel vertex detector as the innermost component of the tracking system in an ILC de-tector. The key idea of DEPFET sensors is the integration of amplifying transistors into a fully depleted bulk in such a way that all signal charges are collected in the ’internal gates ’ of the transistors. The excellent noise per-formance obtained through the low input capacitance in combination with the full signal from the depleted bulk leads to a large S/N ratio. The sen-sor itself can therefore be made very thin (50µm) without loss of efficiency. Readout is performed by cyclic enabling of transistor rows in a large ma-trix. The total system, including readout and sequencing chips, is expected to dissipate less than 10W for a five layer geometry assuming a 1:200 power duty cycle. In this status report the progress of the DEPFET development towards an ILC vertex detector with respect to the last PRC review in May 2005 i