time power estimation and thread scheduling via performance counters

Estimating power consumption is critical for hardware and software developers, and of the latter, particularly for OS programmers writing process schedulers. However, ob-taining processor and system power consumption informa-tion can be non-trivial. Simulators are time consuming and prone to error. Power meters report whole-system consump-tion, but cannot give per-processor or per-thread informa-tion. More intrusive hardware instrumentation is possible, but such solutions are usually employed while designing the system, and are not meant for customer use. Given these difficulties, plus the current availability of some form of performance counters on virtually all plat-forms (even though such counters were initially designed for system bring-up, and not intended for general program-mer consumption), we analytically derive functions for real-time estimation of processor and system power consump-tion using performance counter data on real hardware. Our model uses data gathered from microbenchmarks that cap-ture potential application behavior. The model is indepen-dent of our test benchmarks, and thus we expect it to be well suited for future applications. We target chip multiproces-sors, analyzing effects of shared resources and temperature on power estimation, leveraging our model to implement a simple, power-aware thread scheduler. The NAS and SPEC-OMP benchmarks shows a median error of 5.8 % and 3.9%, respectively. SPEC 2006 shows a marginally higher median error of 7.2%.