Add to ORKGAbstract: In this paper we present a new architecture of video memory data handling in microprocessor-based systems. This architecture is a solution for the real time image processing systems which requires a significant recording time. The solution is based on a simultaneous video memory read/write. This operation is ensured by hardware splits of video memory in separate capacities and by association of a selecting circuit. This later offers a state port and two communication ports. The first communication port is used for reading and the second for writing
In recent years, hardware/software co-design has become important. In particular, the development of...
The thesis, entitled PC-BASED VIDEO FRAME GRABBER aims to capture one frame of a video image, and th...
Video image processing hardware implementation is continually driven to achieve high performance e...
In order to achieve application dependent "real-time" performance, it is necessary with the technolo...
Video processing usually requires one to read in an entire image into a framebuffer, usually taking ...
n this article, we present a new reconfigurable parallel architecture oriented to video-rate compute...
The paper introduces a software architecture to support a user from the image processing community i...
The architecture of the present video processing units in consumer systems is usually based on vario...
With the increasing capacity in today's hardware system design enabled by technology scaling, image ...
Abstract: Two embedded memory designs are proposed for video-signal processing. Concurrent line acce...
In this paper we propose a new orthogonal partially shared memory architecture for the design of mul...
In this thesis, image and video processing algorithms, especially the compression algorithms, are fi...
This paper presents a tool for automatic generation of the memory management implementation for spat...
The design of a low-cost microprocessor-based real-time image acquisition and processing system is p...
In this thesis, both a method and a tool to enable efficient memory synthesis for real-time video pr...
In recent years, hardware/software co-design has become important. In particular, the development of...
The thesis, entitled PC-BASED VIDEO FRAME GRABBER aims to capture one frame of a video image, and th...
Video image processing hardware implementation is continually driven to achieve high performance e...
In order to achieve application dependent "real-time" performance, it is necessary with the technolo...
Video processing usually requires one to read in an entire image into a framebuffer, usually taking ...
n this article, we present a new reconfigurable parallel architecture oriented to video-rate compute...
The paper introduces a software architecture to support a user from the image processing community i...
The architecture of the present video processing units in consumer systems is usually based on vario...
With the increasing capacity in today's hardware system design enabled by technology scaling, image ...
Abstract: Two embedded memory designs are proposed for video-signal processing. Concurrent line acce...
In this paper we propose a new orthogonal partially shared memory architecture for the design of mul...
In this thesis, image and video processing algorithms, especially the compression algorithms, are fi...
This paper presents a tool for automatic generation of the memory management implementation for spat...
The design of a low-cost microprocessor-based real-time image acquisition and processing system is p...
In this thesis, both a method and a tool to enable efficient memory synthesis for real-time video pr...
In recent years, hardware/software co-design has become important. In particular, the development of...
The thesis, entitled PC-BASED VIDEO FRAME GRABBER aims to capture one frame of a video image, and th...
Video image processing hardware implementation is continually driven to achieve high performance e...