A Parallel-Tree Switch Architecture for ATM Networks

In this paper we present a novel ATM switch called Parallel-Tree Banyan Switch Fabric (PTBSF) that consists of par-allel Banyans arranged in a tree topology. Packets enter at the topmost Banyan. Internal con icts are eliminated by using a con ict-free 3 4 switching element which dis-tributes con icting cells over dierent Banyans. Thus, cell loss may occur only at the lowest Banyan. Increasing the number of Banyans leads to noticeable decrease in the cell loss rate. The switch can be engineered to provide arbi-trarily high throughput and low cell loss rate without the use of input buering nor cell pre-processing. The perfor-mance of the switch is evaluated analytically under uniform trac load and by simulation under a variety of ATM trac loads. Compared to other proposed architectures, the switch exhibited stable and excellent performance with respect to cell loss and switching delay for all studied conditions as re-quired by ATM trac sources. The advantages of PTBSF are modularity, regularity, self-routing, low processing over-head, high throughput and robustness under a variety of ATM trac conditions.