Add to ORKGAbstract—Traditional buffer insertion algorithms neglect the impact of inductance effect, which often introduces large error in circuit optimization. On the other hand, ultra-fast buffering techniques are always desirable as buffering is such a widely used technique in industry. It is a challenge to design an RLC buffering algorithm which excels in both runtime and solution quality. In this paper, such an algorithm is proposed. The new algorithm works under the dynamic programming framework and runs in provably linear time for multiple buffer types due to two novel techniques: restrictive cost bucketing and efficient delay update. Experiment results on industrial netlists demonstrate that the new algorithm consistently outperforms van Ginne...
Interconnect delay has become a critical factor in determining the performance of integrated circuit...
Buffer insertion has successfully been applied to reduce delay in global interconnect paths; however...
As the continuous trend of Very Large Scale Integration (VLSI) circuits technol-ogy scaling and freq...
Abstract—The classic buffer insertion algorithm of van Gin-neken has time and space complexity ( 2),...
Abstract- As gate delays decrease faster than wire delays for each technology generation, buffer ins...
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the ...
Buffer insertion is a popular technique to reduce the interconnect delay. The classic buffer inserti...
Buffer insertion is a popular technique to reduce the in-terconnect delay. The classic buffer insert...
As VLSI technology moves to the nanoscale regime, ultra-fast slew buffering techniques considering b...
As VLSI technology enters the nanoscale regime, a great amount of efforts have been made to reduce ...
signs are requiring buffers to be inserted on interconnects of even moderate length for both critica...
For deep-submicron, high-performance circuits, the inductive effect plays a very important role in d...
In modern VLSI design, interconnection delay dominates the circuit delay due to its heavy downstream...
We propose a grid-graph algorithm for interconnect routing and buffer insertion in nanometer VLSI la...
Buffer insertion is a fundamental technology for VLSI interconnect optimization. Several existing bu...
Interconnect delay has become a critical factor in determining the performance of integrated circuit...
Buffer insertion has successfully been applied to reduce delay in global interconnect paths; however...
As the continuous trend of Very Large Scale Integration (VLSI) circuits technol-ogy scaling and freq...
Abstract—The classic buffer insertion algorithm of van Gin-neken has time and space complexity ( 2),...
Abstract- As gate delays decrease faster than wire delays for each technology generation, buffer ins...
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the ...
Buffer insertion is a popular technique to reduce the interconnect delay. The classic buffer inserti...
Buffer insertion is a popular technique to reduce the in-terconnect delay. The classic buffer insert...
As VLSI technology moves to the nanoscale regime, ultra-fast slew buffering techniques considering b...
As VLSI technology enters the nanoscale regime, a great amount of efforts have been made to reduce ...
signs are requiring buffers to be inserted on interconnects of even moderate length for both critica...
For deep-submicron, high-performance circuits, the inductive effect plays a very important role in d...
In modern VLSI design, interconnection delay dominates the circuit delay due to its heavy downstream...
We propose a grid-graph algorithm for interconnect routing and buffer insertion in nanometer VLSI la...
Buffer insertion is a fundamental technology for VLSI interconnect optimization. Several existing bu...
Interconnect delay has become a critical factor in determining the performance of integrated circuit...
Buffer insertion has successfully been applied to reduce delay in global interconnect paths; however...
As the continuous trend of Very Large Scale Integration (VLSI) circuits technol-ogy scaling and freq...