This work is based on our philosophy of providing inter-layer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipartitioned memory systems [18, 19, 25], where mem-ory accesses are separated based on their static predictabil-ity and memory footprint and managed with various com-piler controlled techniques. We show that media applications are mapped more ef-ficiently when scalar memory accesses are redirected to a minicache. Our results indicate that a partitioned 8K cache with the scalars being mapped to a 512 byte minicache can be more efficient than a 16K monolithic cache from both performance and energy point of view for most applica-tions. In extensive experiments, we report...
Minimizing power, increasing performance, and delivering effective memory bandwidth are today's prim...
Recently, energy dissipation by microprocessors is getting larger, which leads to a serious problem ...
The line size/performance trade-offs in off-chip second-level caches in light of energy-efficiency a...
Click on the DOI link to access the article (may not be free).High processing speed is required to s...
Caches consume a significant amount of energy in modern microprocessors. To design an energy-efficie...
One of uncompromising requirements from portable com-puting is energy efficiency, because that affec...
As we approach the era of exascale computing systems, where 1,000-core can be integrated in one die,...
Abstract—Power consumption is an important design issue of current multimedia embedded systems. Data...
We investigate some power efficient data cache designs that try to significantly reduce the cache en...
Several studies have shown that cache memories account for more than 40% of the total energy consume...
One of uncompromising requirements from portable computing is energy efficiency, because that affect...
In this paper, we propose several different data and instruction cache configurations and analyze th...
Abstract Several studies have shown that about 40 % or more of the energy consumption on embedded s...
Cache memory is one of the most important components of a computer system. The cache allows quickly...
With each technology generation we get more transistors per chip. Whilst processor frequencies have ...
Minimizing power, increasing performance, and delivering effective memory bandwidth are today's prim...
Recently, energy dissipation by microprocessors is getting larger, which leads to a serious problem ...
The line size/performance trade-offs in off-chip second-level caches in light of energy-efficiency a...
Click on the DOI link to access the article (may not be free).High processing speed is required to s...
Caches consume a significant amount of energy in modern microprocessors. To design an energy-efficie...
One of uncompromising requirements from portable com-puting is energy efficiency, because that affec...
As we approach the era of exascale computing systems, where 1,000-core can be integrated in one die,...
Abstract—Power consumption is an important design issue of current multimedia embedded systems. Data...
We investigate some power efficient data cache designs that try to significantly reduce the cache en...
Several studies have shown that cache memories account for more than 40% of the total energy consume...
One of uncompromising requirements from portable computing is energy efficiency, because that affect...
In this paper, we propose several different data and instruction cache configurations and analyze th...
Abstract Several studies have shown that about 40 % or more of the energy consumption on embedded s...
Cache memory is one of the most important components of a computer system. The cache allows quickly...
With each technology generation we get more transistors per chip. Whilst processor frequencies have ...
Minimizing power, increasing performance, and delivering effective memory bandwidth are today's prim...
Recently, energy dissipation by microprocessors is getting larger, which leads to a serious problem ...
The line size/performance trade-offs in off-chip second-level caches in light of energy-efficiency a...