This paper presents the results of a systematic study of curvature and stress evolution during thermal loading in single- and multilevel interconnect line structures which have been deposited on a much thicker substrate. Effects of line aspect ratio, passivation geometry, and metal density within a metal-ization level on thermal stress evolution in the lines are addressed. The cur-rent analytical stress model enables us to predict that interaction between lines on the same level, i.e., in the lateral direction, is so strong that it cannot be neglected. A two-dimensional (2-D) finite element method has been used to verify the accuracy of the current model, while available experimental data have been compared with theory. In order to capture ...
[[abstract]]A general formula for the analysis of thermal stresses and radii of curvature of multila...
International audienceIn the field of electronics, the increase of operating temperatures is a major...
Passivated metal lines commonly used in integrated circuits show thermally induced stresses and stra...
This paper presents the results of a systematic study of curvature and stress evolution during therm...
International audienceThe integration of low-k interlayer dielectrics in interconnects is associated...
Abstract—A simple theoretical analysis for curvature evolution in unpassivated and passivated copper...
textThermomechanical stresses in the copper interconnects are directly related to void formation an...
Copper and low dielctric constantant (k) materials are poised to become the dominant interconnect sc...
textThermal stress and mass transport are key issues for Cu metallization yield and reliability. In...
textThermal stress characteristics of high performance interconnects, including Al(Cu)/low-k, Cu/ox...
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2...
This thesis is motivated by reliability problems related to thermal stresses in electronic Cu/low-K ...
The development and relaxation of stress in metal interconnects strained by their surroundings (subs...
During the manufacturing of thin-film heterostructures, a post-deposition thermal anneal may be need...
A discrete dislocation simulation of plastic deformation in metallic interconnects caused by thermal...
[[abstract]]A general formula for the analysis of thermal stresses and radii of curvature of multila...
International audienceIn the field of electronics, the increase of operating temperatures is a major...
Passivated metal lines commonly used in integrated circuits show thermally induced stresses and stra...
This paper presents the results of a systematic study of curvature and stress evolution during therm...
International audienceThe integration of low-k interlayer dielectrics in interconnects is associated...
Abstract—A simple theoretical analysis for curvature evolution in unpassivated and passivated copper...
textThermomechanical stresses in the copper interconnects are directly related to void formation an...
Copper and low dielctric constantant (k) materials are poised to become the dominant interconnect sc...
textThermal stress and mass transport are key issues for Cu metallization yield and reliability. In...
textThermal stress characteristics of high performance interconnects, including Al(Cu)/low-k, Cu/ox...
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2...
This thesis is motivated by reliability problems related to thermal stresses in electronic Cu/low-K ...
The development and relaxation of stress in metal interconnects strained by their surroundings (subs...
During the manufacturing of thin-film heterostructures, a post-deposition thermal anneal may be need...
A discrete dislocation simulation of plastic deformation in metallic interconnects caused by thermal...
[[abstract]]A general formula for the analysis of thermal stresses and radii of curvature of multila...
International audienceIn the field of electronics, the increase of operating temperatures is a major...
Passivated metal lines commonly used in integrated circuits show thermally induced stresses and stra...