In behavioral synthesis for resource shared architecture, multiplexers are in-serted between registers and functional units as a result of binding if necessary. Multiplexer optimization in binding is important for performance, area and power of a synthesized circuit. In this paper, we propose a binding algorithm to reduce total amount of multiplexer ports. Unlike most of the previous works in which binding is performed by a constructive algorithm, our approach is based on an iterative improvement algorithm. Starting point of our approach is initial functional unit binding and initial register binding. Both functional unit binding and register binding are modified by local improvements based on taboo search iteratively. The binding in each i...
Resource sharing in the mapping of an algorithm to an architecture allows the same resource to be sc...
Abstract—Resource sharing is a classic high-level synthesis (HLS) optimization that saves area by ma...
Resource sharing in the mapping of an algorithm to an architecture allows the same resource to be sc...
In behavioral synthesis for resource shared architecture, multiplexers are inserted between register...
Abstract- Data path connection elements, such as multiplexers, consume a significant amount of area ...
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multip...
A conventional binding method for low power in a high-level synthesis mainly focuses on finding an o...
When variables are assigned to registers or memories in FPGAs, multiplexers are needed for correct o...
Hardware binding is an important step in high level synthesis (HLS). The quality of hardware binding...
Abstract—One important way to reduce power consumption is to reduce the spurious switching activity ...
The authors present an integer linear program (ILP) formulation for the allocation and binding probl...
In this paper, we address the problem of reducing the switching activity (SA) in on-chip buses throu...
This work is a contribution to high level synthesis for low power systems. While device feature size...
In this paper we present BINET (BInding using NETwork flows), a heuristic for solving the binding pr...
Abstract—A shared bus is a suitable structure for minimizing the interconnections costs in system sy...
Resource sharing in the mapping of an algorithm to an architecture allows the same resource to be sc...
Abstract—Resource sharing is a classic high-level synthesis (HLS) optimization that saves area by ma...
Resource sharing in the mapping of an algorithm to an architecture allows the same resource to be sc...
In behavioral synthesis for resource shared architecture, multiplexers are inserted between register...
Abstract- Data path connection elements, such as multiplexers, consume a significant amount of area ...
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multip...
A conventional binding method for low power in a high-level synthesis mainly focuses on finding an o...
When variables are assigned to registers or memories in FPGAs, multiplexers are needed for correct o...
Hardware binding is an important step in high level synthesis (HLS). The quality of hardware binding...
Abstract—One important way to reduce power consumption is to reduce the spurious switching activity ...
The authors present an integer linear program (ILP) formulation for the allocation and binding probl...
In this paper, we address the problem of reducing the switching activity (SA) in on-chip buses throu...
This work is a contribution to high level synthesis for low power systems. While device feature size...
In this paper we present BINET (BInding using NETwork flows), a heuristic for solving the binding pr...
Abstract—A shared bus is a suitable structure for minimizing the interconnections costs in system sy...
Resource sharing in the mapping of an algorithm to an architecture allows the same resource to be sc...
Abstract—Resource sharing is a classic high-level synthesis (HLS) optimization that saves area by ma...
Resource sharing in the mapping of an algorithm to an architecture allows the same resource to be sc...