from: ftp.cs.yorku.ca:/pub/TECH-REPORTS Abstract: TTM/RTTL is a comprehensive framework for the specification, development and verification of real-time reactive programs and devices found in embedded, safety critical, or concurrent systems. The framework consists of a specification language called real-time temporal logic (RTTL), and a sound and relatively complete proof system and proof methodology. The framework has heuristics, which have been mechanized using constraint logic, for aiding the designer in the systematic development of infinite state systems, and decision procedures for automatic verification of finite state systems. A toolset called StateTime provides automated support for visual specification, simulation and verification...
AbstractWe extend the specification language of temporal logic, the corresponding verification frame...
In this dissertation, we present a novel framework for the modeling, specification, analysis and des...
International audienceWe propose a verified approach to the formal verification of timed properties ...
This paper presents a new methodology for model checking real-time systems based on the abstraction ...
. We extend the specification language of temporal logic, the corresponding verification framework, ...
The notion of real-time reactive behavior encompasses concurrency, communication through sensors and...
Abstract: Aiming at the requirements specification and related checking of embedded real-time softwa...
ftp.cs.yorku.ca:/pub/TECH-REPORTS/General-CS/CS-ETR-94-07/text.ps2.Z Abstract: StateTime is a protot...
Abstract: This paper extends the TTM/RTTL deductive and model-checking framework for real-time react...
We present a new temporal logic for the specification and verification of real-time systems. This lo...
Critical properties of real-time embedded systems must be verified before these systems ale deployed...
We extend the specification language of temporal logic, the corresponding verification framework, a...
AbstractIn this paper, we present an approach to specification, verification and validation of concu...
Abstract. We introduce a temporal logic for the specification of real-time systems. Our logic, TPTL,...
AbstractThis paper presents a framework for the specification and verification of timing properties ...
AbstractWe extend the specification language of temporal logic, the corresponding verification frame...
In this dissertation, we present a novel framework for the modeling, specification, analysis and des...
International audienceWe propose a verified approach to the formal verification of timed properties ...
This paper presents a new methodology for model checking real-time systems based on the abstraction ...
. We extend the specification language of temporal logic, the corresponding verification framework, ...
The notion of real-time reactive behavior encompasses concurrency, communication through sensors and...
Abstract: Aiming at the requirements specification and related checking of embedded real-time softwa...
ftp.cs.yorku.ca:/pub/TECH-REPORTS/General-CS/CS-ETR-94-07/text.ps2.Z Abstract: StateTime is a protot...
Abstract: This paper extends the TTM/RTTL deductive and model-checking framework for real-time react...
We present a new temporal logic for the specification and verification of real-time systems. This lo...
Critical properties of real-time embedded systems must be verified before these systems ale deployed...
We extend the specification language of temporal logic, the corresponding verification framework, a...
AbstractIn this paper, we present an approach to specification, verification and validation of concu...
Abstract. We introduce a temporal logic for the specification of real-time systems. Our logic, TPTL,...
AbstractThis paper presents a framework for the specification and verification of timing properties ...
AbstractWe extend the specification language of temporal logic, the corresponding verification frame...
In this dissertation, we present a novel framework for the modeling, specification, analysis and des...
International audienceWe propose a verified approach to the formal verification of timed properties ...