DEVELEOPMENT OF A SINGLE-CHIP RF FRONT-END LSI FOR WIRELESS LAN WITH TRANSMISSION LINE BASED MATCHING CIRCUITS

Abstract: In Direct Conversion Receiver (DCR) architecture, the design of mixer is one of the most important steps for a high-performance DCR because it involves the issues of flicker (1/f) noise and conversion gain simultaneously. So, minimizing 1/f noise while achieving high gain without sacrificing linearity for high performance DCR is one of the critical issues. A method to reduce noise factor of a down-conversion mixer by 5-6 dB and to increase conversion gain by 5-6 dB simultaneously has been proposed. In order to reduce the chip size, on-chip CPW lines has been employed to realize on-chip impedance matching circuits which saves 30-40 % chip area than those using the spiral inductors. Finally, RF front-end which consists of on-chip CPW matching circuits, LNA, VCO, and down-conversation mixer has been designed and fabricated on TSMC BiCMOS SiGe 0.35 µm one-poly three-metals technology. A few of the measured results to verify the design theory are presented. 1